Transfer molded semiconductor packages have become a popular form of integrated circuit packaging. Transfer molded pad grid array packages are the most recent development in attempts to reduce size and cost, while achieving ever increasing levels of performance. A transfer molded pad grid array package is a surface mount device using solder pads to provide the electrical connections. An array of pads having a standard spacing (for example, 100 mils center to center) is located on one face of a printed circuit substrate made from glass reinforced materials such as epoxy, polyimide or polyester. An integrated circuit or semiconductor device is mounted on the top side of the substrate and wire bonds are made between the bonding pads of the integrated circuit and the traces on the substrate. The integrated circuit, the leads, and the wire bonds are then completely covered with a thermoset plastic encapsulant to form the package. The encapsulant resin is molded over the integrated circuit chip so as to surround it, the bonding wires, and portions of the substrate. Because the encapsulant resin is molded onto only the upper surface of the substrate, adhesion between the resin and the substrate is extremely important, as there is no provision for mechanical adhesion as in other packages where the resin surrounds the substrate on at least 5 sides.
In transfer molding, the assembly to be encapsulated is located inside a metal mold which has recesses defining the shape of the cover to be produced. Solid plastic is heated and forced under pressure through gates into the mold. The heat and pressure causes the plastic to liquify and flow into the mold cavities surrounding the integrated circuit. The mold is heated to cure the plastic and the molded assembly is then removed from the mold. The basic characteristics of transfer molding are taught in U.S. Pat. No. 4,460,537, and a transfer-molded plastic pin grid array package is taught in U.S. Pat. No. 4,935,581.
Alpha particle induced errors in semiconductor devices were recorded for the first time in 1978. These errors, known as soft errors, are defined as a random, non-reoccurring change in the information stored within a memory cell caused by the passage of an alpha particle through an active device region. Alpha particles originate from residual radioactivity of uranium present as trace impurities in the raw materials used to make the transfer molding compound of the plastic package. The main source of radiation in plastic packages comes from the fillers in the molding compound. The most straightforward solution to eliminating soft errors would be to remove all traces of radioactivity from the molding compound resin. Although this is acceptable in principle, the cost is prohibitive for nearly all applications and some residual activity can still be a problem. Error correction algorithms have been incorporated in some large memory devices to counter soft error problems. However, the extension of this technology to smaller scale circuits is difficult and expensive, leaving a need for a solution to alpha particle emission and soft error problems.
Another problem in transfer molded pad grid array packages is transmission of moisture at the molding compound substrate interface into the center of the package, causing corrosion of the semiconductor and electrical interconnections and degradation of the epoxy die attach adhesive. Previous solutions have extended the molding compound around the edges of the substrate to reduce or eliminate the substrate/molding compound interface problem. However, in pad grid array packages, this is not possible and another method needs to be found to reduce moisture transmission along this interface.
Still another problem with transfer molded packages is the stress induced during the molding operation. The thermal-expansion-coefficient mismatch between the molding compound and the semiconductor device is so large that in some instances cracking of the glass passivation and actual movement of the aluminum conductors on the surface of the device occurs. Buffer coats are sometimes applied to the semiconductor device to alleviate this stress buildup, but this application is performed at the wafer level, and the die bond pads must be protected and then uncovered. This is a costly process, and results in yield loss of the die. In addition, buffer coating at the wafer level precludes back lapping, which is often used to reduce the thickness of the die.
The advantages of a plastic pad grid array are low cost and smaller size. However, despite these advantages, other concerns such as molding compound adhesion, soft errors due to alpha particles, buffer coating cost, the ability to back lap, and moisture resistance remain in pad grid array packages. Clearly, a need exists for a low-cost, plastic package that would overcome these inherent problems.